|
|
@11767
|
16 years |
vboxsync |
VT-x: always enable caching in cr0.
|
|
|
@11763
|
16 years |
vboxsync |
Host CR0 CD, NW & ET bits are not restored after a VM exit. We must …
|
|
|
@11761
|
16 years |
vboxsync |
Filter out X86_CR0_CACHE_DISABLE as well for VT-x. (duh!)
|
|
|
@11757
|
16 years |
vboxsync |
No room for this
|
|
|
@11756
|
16 years |
vboxsync |
Use the wbinvd intercept if it's present in the secondary control.
|
|
|
@11706
|
16 years |
vboxsync |
No need to enable VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS
|
|
|
@11697
|
16 years |
vboxsync |
Comment update
|
|
|
@11696
|
16 years |
vboxsync |
Enabled MSR bitmap for VT-x.
|
|
|
@11517
|
16 years |
vboxsync |
More logging
|
|
|
@11488
|
16 years |
vboxsync |
stoswd emulation fix (DF).
|
|
|
@11398
|
16 years |
vboxsync |
Always sync back the TPR value.
|
|
|
@10886
|
16 years |
vboxsync |
Fixes for syncing back sysenter MSRs.
|
|
|
@10835
|
16 years |
vboxsync |
Obsolete comment removed
|
|
|
@10833
|
16 years |
vboxsync |
Backed out 33617. Doesn't solve anything.
|
|
|
@10832
|
16 years |
vboxsync |
TPR shadow changes.
|
|
|
@10828
|
16 years |
vboxsync |
Update
|
|
|
@10716
|
16 years |
vboxsync |
TPR fix for VT-x
|
|
|
@10667
|
16 years |
vboxsync |
Sync back TPR if necessary.
|
|
|
@10661
|
16 years |
vboxsync |
Reduce the number of world switches caused by cr8 writes by checking …
|
|
|
@10647
|
16 years |
vboxsync |
Manual saving of XMM registers.
Use new FPU/MMX/XMM state saving for …
|
|
|
@10609
|
16 years |
vboxsync |
Check for unexpected rescheduling.
|
|
|
@10607
|
16 years |
vboxsync |
Guest state loading and host state saving *must* be done after TPR …
|
|
|
@10572
|
16 years |
vboxsync |
Use NIL_RTR0MEMOBJ and ASMMemZeroPage.
|
|
|
@10566
|
16 years |
vboxsync |
Comment
|
|
|
@10542
|
16 years |
vboxsync |
Go directly to the halted state when encountering a hlt instruction …
|
|
|
@10537
|
16 years |
vboxsync |
Updated HWACCMDumpRegs
|
|
|
@10502
|
16 years |
vboxsync |
Take precautions for being rescheduled to a different cpu due to long …
|
|
|
@10473
|
16 years |
vboxsync |
MMIO instruction emulation for OR, BT and XOR added.
|
|
|
@10466
|
16 years |
vboxsync |
Write back cached TPR
|
|
|
@10465
|
16 years |
vboxsync |
Cleaned up
|
|
|
@10464
|
16 years |
vboxsync |
More assertions
|
|
|
@10463
|
16 years |
vboxsync |
Use the TPR threshold feature.
|
|
|
@10458
|
16 years |
vboxsync |
TPR & interrupt dispatch updates.
|
|
|
@10360
|
16 years |
vboxsync |
Removed the same assertion as before in the AMD-V code.
|
|
|
@10356
|
16 years |
vboxsync |
Safety precaution
|
|
|
@10355
|
16 years |
vboxsync |
TPR updates
|
|
|
@10353
|
16 years |
vboxsync |
TPR caching for VT-x. Removed the CR8 register from CPUMCTX.
|
|
|
@10206
|
16 years |
vboxsync |
Fixed regression introduced by TPR caching. (never execute code that …
|
|
|
@10108
|
16 years |
vboxsync |
More CR8 updates
|
|
|
@9998
|
16 years |
vboxsync |
Logging update
|
|
|
@9988
|
16 years |
vboxsync |
Unconditionally update the sysenter msrs.
|
|
|
@9964
|
16 years |
vboxsync |
Paranoid assertion
|
|
|
@9821
|
17 years |
vboxsync |
Compile fix
|
|
|
@9817
|
17 years |
vboxsync |
fs & gs base cleanup
|
|
|
@9814
|
17 years |
vboxsync |
FS & GS base msr fixes
|
|
|
@9805
|
17 years |
vboxsync |
Backed out previous changeset
|
|
|
@9804
|
17 years |
vboxsync |
FS & GS syncing
|
|
|
@9802
|
17 years |
vboxsync |
CPUMIsGuestIn64BitCodeEx update
|
|
|
@9720
|
17 years |
vboxsync |
Emulate rdmsr & wrmsr.
Note that Intel mentions a (slightly different) …
|
|
|
@9719
|
17 years |
vboxsync |
Accidental commit
|
|
|
@9718
|
17 years |
vboxsync |
Single instruction emulation for rd/wrmsr
|
|
|
@9708
|
17 years |
vboxsync |
Use RIP everywhere
|
|
|
@9535
|
17 years |
vboxsync |
Log guest state in case of failure.
|
|
|
@9533
|
17 years |
vboxsync |
Dump state in case of VMX_EXIT_ERR_INVALID_GUEST_STATE.
|
|
|
@9484
|
17 years |
vboxsync |
Save & restore CSTAR, STAR, SFMASK & KERNEL_GSBASE MSRs (VT-x)
|
|
|
@9475
|
17 years |
vboxsync |
Added VMXR0StartVM64.
Sync the FS_BASE & GS_BASE MSRs.
|
|
|
@9457
|
17 years |
vboxsync |
Reapplied fixed 31707.
|
|
|
@9453
|
17 years |
vboxsync |
Backed out 31707
|
|
|
@9452
|
17 years |
vboxsync |
Preparing for 64 bits vmlaunch/vmresume.
|
|
|
@9421
|
17 years |
vboxsync |
64 bits hidden selector base.
|
|
|
@9412
|
17 years |
vboxsync |
use macros to access base, limit of a descriptor and offset of an IDT entry
|
|
|
@9411
|
17 years |
vboxsync |
Use a union for esp & rsp, so they are in-sync.
|
|
|
@9407
|
17 years |
vboxsync |
HWACCM updates.
|
|
|
@9385
|
17 years |
vboxsync |
Backed out some of the changes. Broke VT-x
|
|
|
@9384
|
17 years |
vboxsync |
Compile fix
|
|
|
@9383
|
17 years |
vboxsync |
VT-x/AMD-V updates for 64 bits guests
|
|
|
@9212
|
17 years |
vboxsync |
Major changes for sizeof(RTGCPTR) == uint64_t.
Introduced RCPTRTYPE …
|
|
|
@9188
|
17 years |
vboxsync |
Same IF fix for halt instructions in VT-x.
|
|
|
@9151
|
17 years |
vboxsync |
Statistics
|
|
|
@8876
|
17 years |
vboxsync |
ASID based TLB flushing
|
|
|
@8659
|
17 years |
vboxsync |
Updates for 64 bits paging.
Removed conditional dirty and accessed …
|
|
|
@8155
|
17 years |
vboxsync |
The Big Sun Rebranding Header Change
|
|
|
@7717
|
17 years |
vboxsync |
Some write protect changes
|
|
|
@7500
|
17 years |
vboxsync |
Logging update
|
|
|
@7496
|
17 years |
vboxsync |
Moved VMCS allocation to ring 0.
|
|
|
@7495
|
17 years |
vboxsync |
More logging
|
|
|
@7471
|
17 years |
vboxsync |
Rewrote VT-x & AMD-V mode changes. Requires the MP apis in our runtime …
|
|
|
@5999
|
17 years |
vboxsync |
The Giant CDDL Dual-License Header Change.
|
|
|
@5605
|
17 years |
vboxsync |
BIT => RT_BIT, BIT64 => RT_BIT_64. BIT() is defined in Linux 2.6.24
|
|
|
@5448
|
17 years |
vboxsync |
VT-x: wrong return code for a task switch
|
|
|
@5447
|
17 years |
vboxsync |
Bugfix for rare cases where a pending interrupt is cleared behind our back
|
|
|
@5073
|
17 years |
vboxsync |
Limit the amount of resume loops
|
|
|
@4932
|
17 years |
vboxsync |
Always use the ioctl path for hwaccm code execution.
|
|
|
@4790
|
17 years |
vboxsync |
Paranoid checks
|
|
|
@4789
|
17 years |
vboxsync |
Also use host OS ioctls to go to ring 0 for hardware virtualization.
|
|
|
@4764
|
17 years |
vboxsync |
Translate VERR_EM_INTERPRETER to VINF_EM_RAW_EMULATE_INSTR.
|
|
|
@4420
|
17 years |
vboxsync |
Force recompiler emulation of string io operations to work around host …
|
|
|
@4411
|
17 years |
vboxsync |
Disabled string io operations for ring 0 (hangs/crashes host). Debug …
|
|
|
@4402
|
17 years |
vboxsync |
Corrected assertion
|
|
|
@4071
|
17 years |
vboxsync |
Biggest check-in ever. New source code headers for all (C) innotek files.
|
|
|
@4000
|
17 years |
vboxsync |
uint32_t -> int32_t
|
|
|
@3299
|
17 years |
vboxsync |
Changed error code for vmxon failures.
|
|
|
@3292
|
17 years |
vboxsync |
Write the exact reason for VMX/SVM detection failure to the release log.
|
|
|
@3279
|
17 years |
vboxsync |
Log VMXON failures
|
|
|
@3216
|
17 years |
vboxsync |
Removed incorrect io return code changes.
|
|
|
@3197
|
17 years |
vboxsync |
IO handling updates
|
|
|
@3184
|
18 years |
vboxsync |
return VINF_EM_RAW_EMULATE_INSTR instead of VINF_EM_RESCHEDULE_REM …
|
|
|
@3172
|
18 years |
vboxsync |
compile fix
|
|
|
@3171
|
18 years |
vboxsync |
Fixes for bad error code VINF_EM_RESCHEDULE_REM.
|
|
|
@3169
|
18 years |
vboxsync |
More IOM_SUCCESS changes
|
|
|