|
|
@12989
|
16 years |
vboxsync |
VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into …
|
|
|
@12824
|
16 years |
vboxsync |
FreeBSD boot assertion fix (VT-x real-mode emulation).
|
|
|
@12822
|
16 years |
vboxsync |
The hypervisor dump is not relevant when we're in VT-x/AMD-V mode.
|
|
|
@12795
|
16 years |
vboxsync |
HWACCM: fixed unsigned/signed compare warning (x86.h), use const and g_.
|
|
|
@12793
|
16 years |
vboxsync |
More fixes for real-mode emulation in VT-x. Now enabled by default for …
|
|
|
@12788
|
16 years |
vboxsync |
Monitor X86_CR4_VME changes as well if emulated real-mode is enabled.
|
|
|
@12787
|
16 years |
vboxsync |
Accidental commit.
|
|
|
@12786
|
16 years |
vboxsync |
Real-mode support for VT-x. (currently disabled)
|
|
|
@12763
|
16 years |
vboxsync |
Fixed IF handling for real mode. (iopl=3, no need for VIF)
|
|
|
@12756
|
16 years |
vboxsync |
Attempt to correct hidden selector attributes when switching from real …
|
|
|
@12751
|
16 years |
vboxsync |
Corrected assertion again
|
|
|
@12750
|
16 years |
vboxsync |
Sigh
|
|
|
@12749
|
16 years |
vboxsync |
Corrected assertion
|
|
|
@12748
|
16 years |
vboxsync |
Updates
|
|
|
@12747
|
16 years |
vboxsync |
Put back #GP handler.
|
|
|
@12746
|
16 years |
vboxsync |
Bitmap corrections.
|
|
|
@12745
|
16 years |
vboxsync |
Adjust TSS size for real-mode emulation (VT-x).
|
|
|
@12737
|
16 years |
vboxsync |
Got rid of debugging code
|
|
|
@12736
|
16 years |
vboxsync |
Backed out 37055/56. Need to use the io bitmap in the TSS instead. …
|
|
|
@12733
|
16 years |
vboxsync |
Updates
|
|
|
@12732
|
16 years |
vboxsync |
#GP handler should emulation io instructions in real mode. (VT-x)
|
|
|
@12730
|
16 years |
vboxsync |
Updates for real mode execution with VT-x.
|
|
|
@12726
|
16 years |
vboxsync |
TR selector attributes for real mode changes.
|
|
|
@12725
|
16 years |
vboxsync |
Logging update + selector sync correction for real mode.
|
|
|
@12711
|
16 years |
vboxsync |
More logging
|
|
|
@12708
|
16 years |
vboxsync |
Comments added
|
|
|
@12702
|
16 years |
vboxsync |
#1865: HWACCM - alignment fix+check for 32-bit gcc, doxygen.
|
|
|
@12699
|
16 years |
vboxsync |
Merge real mode sync changes.
|
|
|
@12698
|
16 years |
vboxsync |
Corrections
|
|
|
@12697
|
16 years |
vboxsync |
Only sync back TR when we're in protected mode.
|
|
|
@12692
|
16 years |
vboxsync |
Backed out paging changes (36990/86/83).
|
|
|
@12687
|
16 years |
vboxsync |
Started with VMM device heap for use with VT-x real-mode emulation. …
|
|
|
@12681
|
16 years |
vboxsync |
Updates for real and protected mode without paging shadow mode.
|
|
|
@12674
|
16 years |
vboxsync |
Off by one.
|
|
|
@12664
|
16 years |
vboxsync |
IO breakpoint length implies an io range.
|
|
|
@12625
|
16 years |
vboxsync |
IO breakpoints triggered after the fact.
|
|
|
@12610
|
16 years |
vboxsync |
Extra statistics for IO debug breakpoint checking.
|
|
|
@12609
|
16 years |
vboxsync |
IO breakpoint support for VT-x and AMD-V.
|
|
|
@12600
|
16 years |
vboxsync |
Turned dr0..dr7 into an array.
|
|
|
@12578
|
16 years |
vboxsync |
Enable hardware breakpoint support for VT-x and AMD-V.
|
|
|
@12554
|
16 years |
vboxsync |
Some debug register statistics added.
|
|
|
@12549
|
16 years |
vboxsync |
VMM: Implemented a TSC mode where it's tied to execution and halt …
|
|
|
@12501
|
16 years |
vboxsync |
Comment added
|
|
|
@12350
|
16 years |
vboxsync |
Cleaned up a bit.
|
|
|
@12225
|
16 years |
vboxsync |
VMM: X86_DR7_ENABLED_MASK should not include GD, because it isn't a …
|
|
|
@12162
|
16 years |
vboxsync |
VMM: Assert that we don't change CPU unexpectedly while executing in …
|
|
|
@12121
|
16 years |
vboxsync |
Committed hardware breakpoint support for VT-x and AMD-V. Untested and …
|
|
|
@12091
|
16 years |
vboxsync |
Debug register support updates
|
|
|
@12090
|
16 years |
vboxsync |
Started with hardware debug register support.
Fixed out of sync …
|
|
|
@12079
|
16 years |
vboxsync |
More specific error messages for unexpected VT-x failures.
|
|
|
@12068
|
16 years |
vboxsync |
More release logging for the VERR_VMX_INVALID_VMCS_PTR case.
|
|
|
@11767
|
16 years |
vboxsync |
VT-x: always enable caching in cr0.
|
|
|
@11763
|
16 years |
vboxsync |
Host CR0 CD, NW & ET bits are not restored after a VM exit. We must …
|
|
|
@11761
|
16 years |
vboxsync |
Filter out X86_CR0_CACHE_DISABLE as well for VT-x. (duh!)
|
|
|
@11757
|
16 years |
vboxsync |
No room for this
|
|
|
@11756
|
16 years |
vboxsync |
Use the wbinvd intercept if it's present in the secondary control.
|
|
|
@11706
|
16 years |
vboxsync |
No need to enable VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS
|
|
|
@11697
|
16 years |
vboxsync |
Comment update
|
|
|
@11696
|
16 years |
vboxsync |
Enabled MSR bitmap for VT-x.
|
|
|
@11517
|
16 years |
vboxsync |
More logging
|
|
|
@11488
|
16 years |
vboxsync |
stoswd emulation fix (DF).
|
|
|
@11398
|
16 years |
vboxsync |
Always sync back the TPR value.
|
|
|
@10886
|
16 years |
vboxsync |
Fixes for syncing back sysenter MSRs.
|
|
|
@10835
|
16 years |
vboxsync |
Obsolete comment removed
|
|
|
@10833
|
16 years |
vboxsync |
Backed out 33617. Doesn't solve anything.
|
|
|
@10832
|
16 years |
vboxsync |
TPR shadow changes.
|
|
|
@10828
|
16 years |
vboxsync |
Update
|
|
|
@10716
|
16 years |
vboxsync |
TPR fix for VT-x
|
|
|
@10667
|
16 years |
vboxsync |
Sync back TPR if necessary.
|
|
|
@10661
|
16 years |
vboxsync |
Reduce the number of world switches caused by cr8 writes by checking …
|
|
|
@10647
|
16 years |
vboxsync |
Manual saving of XMM registers.
Use new FPU/MMX/XMM state saving for …
|
|
|
@10609
|
16 years |
vboxsync |
Check for unexpected rescheduling.
|
|
|
@10607
|
16 years |
vboxsync |
Guest state loading and host state saving *must* be done after TPR …
|
|
|
@10572
|
16 years |
vboxsync |
Use NIL_RTR0MEMOBJ and ASMMemZeroPage.
|
|
|
@10566
|
16 years |
vboxsync |
Comment
|
|
|
@10542
|
16 years |
vboxsync |
Go directly to the halted state when encountering a hlt instruction …
|
|
|
@10537
|
16 years |
vboxsync |
Updated HWACCMDumpRegs
|
|
|
@10502
|
16 years |
vboxsync |
Take precautions for being rescheduled to a different cpu due to long …
|
|
|
@10473
|
16 years |
vboxsync |
MMIO instruction emulation for OR, BT and XOR added.
|
|
|
@10466
|
16 years |
vboxsync |
Write back cached TPR
|
|
|
@10465
|
16 years |
vboxsync |
Cleaned up
|
|
|
@10464
|
16 years |
vboxsync |
More assertions
|
|
|
@10463
|
16 years |
vboxsync |
Use the TPR threshold feature.
|
|
|
@10458
|
16 years |
vboxsync |
TPR & interrupt dispatch updates.
|
|
|
@10360
|
16 years |
vboxsync |
Removed the same assertion as before in the AMD-V code.
|
|
|
@10356
|
16 years |
vboxsync |
Safety precaution
|
|
|
@10355
|
16 years |
vboxsync |
TPR updates
|
|
|
@10353
|
16 years |
vboxsync |
TPR caching for VT-x. Removed the CR8 register from CPUMCTX.
|
|
|
@10206
|
16 years |
vboxsync |
Fixed regression introduced by TPR caching. (never execute code that …
|
|
|
@10108
|
16 years |
vboxsync |
More CR8 updates
|
|
|
@9998
|
16 years |
vboxsync |
Logging update
|
|
|
@9988
|
16 years |
vboxsync |
Unconditionally update the sysenter msrs.
|
|
|
@9964
|
16 years |
vboxsync |
Paranoid assertion
|
|
|
@9821
|
17 years |
vboxsync |
Compile fix
|
|
|
@9817
|
17 years |
vboxsync |
fs & gs base cleanup
|
|
|
@9814
|
17 years |
vboxsync |
FS & GS base msr fixes
|
|
|
@9805
|
17 years |
vboxsync |
Backed out previous changeset
|
|
|
@9804
|
17 years |
vboxsync |
FS & GS syncing
|
|
|
@9802
|
17 years |
vboxsync |
CPUMIsGuestIn64BitCodeEx update
|
|
|
@9720
|
17 years |
vboxsync |
Emulate rdmsr & wrmsr.
Note that Intel mentions a (slightly different) …
|
|
|