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Disassembler

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	Rev	Age	Author	Log Message
(edit)	@108049	6 weeks	vboxsync	Runtime/RTScriptLex*: Allow case insensitivity with converting all …
(edit)	@107418	2 months	vboxsync	Disassembler/{DisasmFormatArmV8.cpp,DisasmFormatYasm.cpp}: Remove …
(edit)	@107417	2 months	vboxsync	Disassembler/DisasmCore-armv8.cpp: Explicitely cast the result to …
(edit)	@107011	4 months	vboxsync	Disassembler/DisasmCore-armv8: Implemented stub for parsing CRnCRm to …
(edit)	@106817	5 months	vboxsync	Disassembler: Decode SIMD load/store multiple structures …
(edit)	@106816	5 months	vboxsync	Disassembler: Decode SIMD load/store multiple structures …
(edit)	@106805	5 months	vboxsync	Disassembler: Decode RCW compare and swap and RCW compare and swap …
(edit)	@106791	5 months	vboxsync	Disassembler: Decode Advanced SIMD load/store multiple structures …
(edit)	@106783	5 months	vboxsync	Disassembler: Decode Load/Store ordered instructions, bugref:10394
(edit)	@106782	5 months	vboxsync	Disassembler: Decode Load/Store exclusive pair instructions, bugref:10394
(edit)	@106777	5 months	vboxsync	Disassembler: Decode Load/Store exclusive register instructions, …
(edit)	@106774	5 months	vboxsync	Disassembler: Compare and swap instructions, bugref:10394 [fix]
(edit)	@106773	5 months	vboxsync	Disassembler: Compare and swap instructions, bugref:10394 [comment]
(edit)	@106772	5 months	vboxsync	Disassembler: Compare and swap instructions, bugref:10394
(edit)	@106770	5 months	vboxsync	Disassembler: Decode load/store memory tags instructions, bugref:10394
(edit)	@106768	5 months	vboxsync	Disassembler: Decode ldr/ldrsw (literal) instructions, bugref:10394
(edit)	@106767	5 months	vboxsync	Disassembler: Decode atomic memory operation instructions (FEAT_LSE, …
(edit)	@106760	5 months	vboxsync	Disassembler: Decode Add/Subtract (extended register) instructions, …
(edit)	@106758	5 months	vboxsync	Disassembler: Decode ldraa/ldrab instructions, bugref:10394
(edit)	@106757	5 months	vboxsync	Disassembler: Decode SIMD ldr/str (immediate pre index) instructions, …
(edit)	@106756	5 months	vboxsync	Disassembler: Decode SIMD ldr/str (immediate post index) instructions, …
(edit)	@106754	5 months	vboxsync	Disassembler: Decode SIMD ldnp/stnp (no allocate register pair) …
(edit)	@106752	5 months	vboxsync	Disassembler: Decode SIMD ldur/stur (unscaled immediate) instructions, …
(edit)	@106751	5 months	vboxsync	Disassembler: Decode SIMD ldr/str (register offset) instructions, …
(edit)	@106746	5 months	vboxsync	Disassembler: Decode SIMD ldr/str instructions, bugref:10394
(edit)	@106744	5 months	vboxsync	Disassembler: Calculate final displacement in the core already, some …
(edit)	@106742	5 months	vboxsync	Disassembler: Fix opcode typoe flags for control flow instructions, …
(edit)	@106739	5 months	vboxsync	Disassembler: Decode more barrier and addg/subg instructions, bugref:10394
(edit)	@106737	5 months	vboxsync	Disassembler: Decode adc/adcs/sbc/sbcs/rmif/setf8/setf16 instructions, …
(edit)	@106735	5 months	vboxsync	Disassembler: Decode pacga instruction, bugref:10394
(edit)	@106734	5 months	vboxsync	Disassembler: Decode immediate variants of cmmn/ccmp instructions, …
(edit)	@106706	5 months	vboxsync	Disassembler: Decode 3-source register data processing instructions, …
(edit)	@106705	5 months	vboxsync	Disassembler: Decode conditional select instructions, bugref:10394
(edit)	@106694	5 months	vboxsync	Disassembler: Decode ldnp/stnp non temporal hint load/store …
(edit)	@106693	5 months	vboxsync	Disassembler: Move load/store decoding into its own template file, …
(edit)	@106680	5 months	vboxsync	Disasembler: Decode extr instruction, bugref:10394
(edit)	@106679	5 months	vboxsync	Disasembler: Decode unprivileged load/store instructions, bugref:10394
(edit)	@106668	5 months	vboxsync	Disassembler/testcase/tstDisasmArmv8-1-asm.S: Exclude some …
(edit)	@106662	5 months	vboxsync	Disassembler: pcbInstr is optional, bugref:10394
(edit)	@106659	5 months	vboxsync	Disassembler: Decode post-indexed load/store instructions, bugref:10394
(edit)	@106657	5 months	vboxsync	Disassembler: Decode pre-indexed load instructions, bugref:10394
(edit)	@106652	5 months	vboxsync	Disassembler: Decode more branch instructions, change the opcode table …
(edit)	@106649	5 months	vboxsync	Disassembler: Decode more branch instructions, change the opcode table …
(edit)	@106632	5 months	vboxsync	Disassembler: Decode more hint instructions instructions, bugref:10394
(edit)	@106631	5 months	vboxsync	Disassembler: Decode data processing 1-source instructions, bugref:10394
(edit)	@106627	5 months	vboxsync	Disassembler: Decode irg, gmi and subp instructions, bugref:10394
(edit)	@106626	5 months	vboxsync	Disassembler: Re-arrange the ARMv8 tables to allow for multiple …
(edit)	@106618	5 months	vboxsync	Disassembler: Get rid of fClass member and convert the only real use …
(edit)	@106616	5 months	vboxsync	Disassembler: Fix decoding instructions which take sp as a register …
(edit)	@106435	5 months	vboxsync	Disassembler/tstDisasmArmv8-1: Only build on darwin.arm64 for now, …
(edit)	@106387	5 months	vboxsync	Disassembler: Disassemble dsb instruction, bugref:10394
(edit)	@106061	6 months	vboxsync	Copyright year updates by scm.
(edit)	@106018	6 months	vboxsync	Disassembler/ArmV8: Updates and start on floating point and SIMD …
(edit)	@106005	6 months	vboxsync	Disassembler/ArmV8: Updates and start on floating point and SIMD …
(edit)	@106004	6 months	vboxsync	Disassembler/ArmV8: Updates and start on floating point and SIMD …
(edit)	@106003	6 months	vboxsync	Disassembler/testcase/tstDisasmArmv8-1: Implement testcase which …
(edit)	@105858	7 months	vboxsync	Disassembler/ARMv8: Implement decoding of the ldr/str …
(edit)	@105857	7 months	vboxsync	Disassembler/ARMv8: Implement decoding of the ldr/str (unscaled …
(edit)	@105848	7 months	vboxsync	Disassembler/ARMv8: Support disassembling the load/store register …
(edit)	@105832	7 months	vboxsync	Disassembler/ARMv8: Implement decoding of the ldp/stp unsigned variant …
(edit)	@105830	7 months	vboxsync	Disassembler/ARMv8: Implement decoding of the ldp/stp unsigned variant …
(edit)	@105815	7 months	vboxsync	Disassembler/ARMv8: Started decoding more ldr/str instruction …
(edit)	@105810	7 months	vboxsync	Disassembler/ARMv8: Implement disassembly of ccmp/ccmn register …
(edit)	@105808	7 months	vboxsync	Disassembler/ARMv8: Rework the disassembler tables to allow for an …
(edit)	@105807	7 months	vboxsync	Disassembler/ARMv8: Rename DIS_ARMV8_INSN_PARAM_CREATE -> …
(edit)	@105806	7 months	vboxsync	Disassembler/ARMv8: Rework the disassembler tables to allow for an …
(edit)	@105796	7 months	vboxsync	Disassembler/ARMv8: Start some very simple alias conversion for orr -> …
(edit)	@105794	7 months	vboxsync	Disassembler/ARMv8: Build fixes, our ancient compilers on the 32-bit …
(edit)	@105793	7 months	vboxsync	Disassembler/ARMv8: Updates, decode br/blr instructions, add them to …
(edit)	@105790	7 months	vboxsync	Disassembler/ARMv8: Updates, decode add/adds/sub/subs shifted …
(edit)	@105789	7 months	vboxsync	Disassembler/ARMv8: Move the mask bits from the opcode into the class …
(edit)	@105785	7 months	vboxsync	Disassembler/ARMv8: Updates, decode basic ldr/str (unsigned with …
(edit)	@105779	7 months	vboxsync	Disassembler/ARMv8: Updates, decode more instructions, add them to the …
(edit)	@105759	7 months	vboxsync	Disassembler/testcase: Add tstDisasmArmv8-1 testcase for testing the …
(edit)	@105758	7 months	vboxsync	Disassembler/testcase: Add tstDisasmArmv8-1 testcase for testing the …
(edit)	@105756	7 months	vboxsync	Runtime/script: Add a simple lexer API to turn a stream of characters …
(edit)	@105748	7 months	vboxsync	Disassembler/testcase: Add tstDisasmArmv8-1 testcase for testing the …
(edit)	@105747	7 months	vboxsync	Disassembler/ARMv8: Mark absolute addresses as comments when …
(edit)	@105738	7 months	vboxsync	Disassembler/ARMv8: Build fix and add support conditionals, …
(edit)	@105737	7 months	vboxsync	Disassembler/ARMv8: Build fix and add support conditionals, …
(edit)	@105736	7 months	vboxsync	Disassembler/ARMv8: Build fix and add support conditionals, bugref:10388
(edit)	@105734	7 months	vboxsync	Disassembler/ARMv8: Refactoring and updates, among others make it …
(edit)	@105731	7 months	vboxsync	Disassembler/ARMv8: Refactoring and updates, among others make it …
(edit)	@105724	7 months	vboxsync	Disassembler,VMM,HostDrivers,Debugger,MakeAlternativeSource: Convert …
(edit)	@105314	8 months	vboxsync	Disassembler: Fix disassembly of vcvttsd2si and vcvtsd2si, bugref:9898
(edit)	@105310	8 months	vboxsync	Disassembler: Implement diassembly for vcvtsi2sd, bugref:9898
(edit)	@105281	8 months	vboxsync	Disassembler: Fix disassembly of vcmpps, vcmppd, vcmpss, vcmpsd, …
(edit)	@104734	10 months	vboxsync	Disassembler,HostDrivers/Support: Build disassembler and SUPR3 …
(edit)	@104616	10 months	vboxsync	Disassembler/tstDisasm-2: Comment out unused assignment, bugref:3409
(edit)	@104522	10 months	vboxsync	DIS: cvtps2pd todo. bugref:10683
(edit)	@104111	12 months	vboxsync	DIS: Fixed missing row (0xad) in g_aDisasVexMap1_66. bugref:9898
(edit)	@103928	12 months	vboxsync	DIS: Correct movzx ambiguity with memory source. Makes 'kmk check' …
(edit)	@103927	12 months	vboxsync	VMM/IEM,DIS: Some disassembly corrections for pblendvb, blendvps and …
(edit)	@103717	13 months	vboxsync	DIS: cmpxchg8b/16b fix
(edit)	@103709	13 months	vboxsync	DIS: Fixed up all VEX groups and added a few missing instructions.
(edit)	@103698	13 months	vboxsync	DIS: Added a bunch of missing group 7 instructions and rearranged the …
(edit)	@103599	13 months	vboxsync	Disassembler: Add vpslrdq (with and without prefix variant), bugref:9898
(edit)	@103511	13 months	vboxsync	DIS: Added vex group 13 and redid some or the vex prefix decoding.
(edit)	@101651	17 months	vboxsync	Disassembler,HostDrivers/Support: Makefile fixes to make it work on …
(edit)	@101546	17 months	vboxsync	DIS: Added DIS_FMT_FLAGS_BYTES_WIDTH_MASK/SHIFT/MAKE and …

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